This invention pertains to the digital detection art and, in particular, to a means for detecting a synchronous, non return to zero, psuedo random bit stream.
Complex digital bit encoding of information, for example speech, is commonly found in the communication "scrambler" art. In such encoding systems the information is converted to a digital bit stream. In a particularly effective encoding scheme, the information is encoded via a psuedo random process. Here, the bit stream is synchronous to a fundamental clock frequency. The encoding utilizes integer submultiple harmonics of the fundamental clock frequency, which submultiples range from 1/2 to 1/N of the clock frequency, where N, an integer, is dependent on the particular system chosen. Further encoding may be utilized by generating bits on a non return to zero basis.
By non return to zero, it is meant that if adjoining bits are at the same logic state they are encoded as a continuum rather than returning the signal to zero at the bit's interface.
Complicated data bit stream encoding has required sophisticated decoders. For the psuedo random encoding process, the decoder must first recreate the clock signal and then use the clock to decode the bit stream. Since the encoding process works only off submultiple harmonics of the fundamental clock frequency, it is apparent that any data transition occurring in quadrature with the clock is noise and not information. Thus, the prior art has suggested utilizing a quadrature detector to sense the presence of a received information bit stream. Quadrature detection, by itself, has not yielded an optimum detection technique since the quadrature detectors known in the prior art are severely degraded in low signal to noise conditions, and are subject to "jitter" error, due to their low sensitivity.
Furthermore, in some applications quadrature detection alone does not provide the required detection certainty.